byucc.jhdl.CSRC
Class and7_dp

java.lang.Object
  extended bybyucc.jhdl.base.Nameable
      extended bybyucc.jhdl.base.Node
          extended bybyucc.jhdl.base.Cell
              extended bybyucc.jhdl.base.Structural
                  extended bybyucc.jhdl.Logic.LogicGates
                      extended bybyucc.jhdl.Logic.LogicStatic
                          extended bybyucc.jhdl.Logic.Logic
                              extended bybyucc.jhdl.CSRC.CSRCCL
                                  extended bybyucc.jhdl.CSRC.and7_dp
All Implemented Interfaces:
BooleanFlags, Clockable, PreDefinedSchematic, byucc.jhdl.base.Propagateable, TreeListable

public final class and7_dp
extends CSRCCL
implements PreDefinedSchematic

This class implements and asynchronous 7-input and gate. This cell is a macro cell, and is internally mapped into the F,G, and H-LUTs of a single CLB.


Field Summary
static CellInterface[] cell_interface
           
static java.lang.String cellname
          The static cellname (netlist reference name) for and7_dp
protected  int width
          The port interface for: and7_dp i_0 : in ("gw") i_1 : in ("gw") i_2 : in ("gw") i_3 : in ("gw") i_4 : in ("gw") i_5 : in ("gw") i_6 : in ("gw") o_0 : out ("gw") parameter: "gw" (INTEGER).
 
Fields inherited from class byucc.jhdl.CSRC.CSRCCL
implicit_interface
 
Fields inherited from class byucc.jhdl.Logic.Logic
ABOVE, ALIGN_BOTTOM, ALIGN_CENTER, ALIGN_LEFT, ALIGN_LSB, ALIGN_MSB, ALIGN_RIGHT, ALIGN_TOP, BELOW, DOWN, EAST_OF, LEFT_OF, MAX_PACK, NORTH_OF, ON, ONTOP, ONTOP_OF, RIGHT_OF, SOUTH_OF, TOLEFT, TORIGHT, UNCONSTRAINED, UP, WEST_OF
 
Fields inherited from class byucc.jhdl.Logic.LogicGates
tech_mapper
 
Fields inherited from class byucc.jhdl.base.Cell
BOOLEAN, CELL_NAME_DECLARATION, CellInterfaceDeterminesUniqueNetlistStructure, DETERMINE_FROM_STRING, GENERICS_DECLARATION, IMPLICIT_INTERFACE_DECLARATION, INTEGER, INTERFACE_DECLARATION, LONG, PORT_IOS_DECLARATION, PORT_NAMES_DECLARATION, PORT_NET_NAMES_DECLARATION, PORT_PROPERTIES, PORT_WIDTHS_DECLARATION, SIGN_EXT, STRING, ZERO_PAD
 
Fields inherited from interface byucc.jhdl.apps.Viewers.Schematic.PreDefinedSchematic
PreDefinedSchematic_ADD, PreDefinedSchematic_ADDSUB, PreDefinedSchematic_AND, PreDefinedSchematic_BUF, PreDefinedSchematic_CONST, PreDefinedSchematic_GEN, PreDefinedSchematic_GND, PreDefinedSchematic_INC, PreDefinedSchematic_INV, PreDefinedSchematic_MUX, PreDefinedSchematic_NAND, PreDefinedSchematic_NOR, PreDefinedSchematic_OR, PreDefinedSchematic_PULLDOWN, PreDefinedSchematic_PULLUP, PreDefinedSchematic_REG, PreDefinedSchematic_SHL, PreDefinedSchematic_SHR, PreDefinedSchematic_TBUF, PreDefinedSchematic_VCC, PreDefinedSchematic_XNOR, PreDefinedSchematic_XOR
 
Fields inherited from interface byucc.jhdl.base.BooleanFlags
ANTECEDANT_IS_BEHAVIORALLY_MODELED, ASYNC_PORT, ASYNCHRONOUS_RESOLVED, ATOMICALLY_PLACEABLE, ATOMICALLY_UNMAPPABLE, BEHAVIORALLY_MODELED_BRANCH, CLK_PORT, CLOCK_METHOD_IMPLEMENTED_BY_USER, CLOCK_METHOD_IS_DISABLED, CLOCKABLE_IS_SCHEDULED, DANGLING_IS_OK, DELETE_MARK, FATAL_BUILD_ERROR_OCCURED, HAS_BEEN_TRACED, HAS_USER_SPECIFIED_NAME, HWUPDATE, IMPLICIT_PORT, IN_CLK_PORT, IN_PORT, INOUT_PORT, IO_TYPE_FLAGS, IS_BEHAVIORALLY_MODELED, IS_ON_BUILD_STACK, IS_ON_PROP_LIST, IS_PLACED, METHODS_IMPLEMENTED_BY_USER, NETLISTABLE, ORIG_WIRE_IS_ATOMIC, OUT_PORT, PLACEMENT_IS_LOCKED, PROPAGATE_METHOD_IMPLEMENTED_BY_USER, PROPAGATE_METHOD_IS_DISABLED, RECURSION_FLAG, RESET_METHOD_IMPLEMENTED_BY_USER, SIMULATEABLE, SOURCELESS_IS_OK, SYNC_PORT, VISIBLE
 
Constructor Summary
protected and7_dp(Node parent)
          Used only by child classes to pass up the parent cell.
  and7_dp(Node parent, ArgBlockList abl)
          Constructs a new and7_dp, connecting its ports as given by the String-Wire pairs in the ArgBlockList.
protected and7_dp(Node parent, java.lang.String name)
          Used only by child classes to pass up the parent cell and instance name.
  and7_dp(Node parent, java.lang.String instanceName, ArgBlockList abl)
          Constructs a new and7_dp, connecting its ports as given by the String-Wire pairs in the ArgBlockList.
  and7_dp(Node parent, java.lang.String instanceName, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3, java.lang.String s4, Wire w4, java.lang.String s5, Wire w5, java.lang.String s6, Wire w6, java.lang.String s7, Wire w7)
          Constructs a new and7_dp, connecting each Wire to the port whose name is given by the accompanying String parameter The initial String parameter specifies the instance name.
  and7_dp(Node parent, java.lang.String s0, Wire w0, java.lang.String s1, Wire w1, java.lang.String s2, Wire w2, java.lang.String s3, Wire w3, java.lang.String s4, Wire w4, java.lang.String s5, Wire w5, java.lang.String s6, Wire w6, java.lang.String s7, Wire w7)
          Constructs a new and7_dp, connecting each Wire to the port whose name is given by the accompanying String parameter
  and7_dp(Node parent, java.lang.String instanceName, Wire i_0, Wire i_1, Wire i_2, Wire i_3, Wire i_4, Wire i_5, Wire i_6, Wire o_0)
          Constructs a new and7_dp.
  and7_dp(Node parent, Wire i_0, Wire i_1, Wire i_2, Wire i_3, Wire i_4, Wire i_5, Wire i_6, Wire o_0)
          Constructs a new and7_dp.
 
Method Summary
 boolean cellInterfaceDeterminesUniqueNetlistStructure()
          When false, the default behavior of this method, each cell will list itself separately in a netlist, guaranteeing that the netlist will not have invalid data at the expense of a larger file-size.
 java.lang.String getCellName()
          Access the cell name associated with a derived class.
static void main(java.lang.String[] argv)
           
static void test()
           
 int type()
          This method returns one of the predefined schematic constants to identify the type of this cell.
 
Methods inherited from class byucc.jhdl.CSRC.CSRCCL
connectImplicitPorts
 
Methods inherited from class byucc.jhdl.Logic.Logic
clockDriver, clockDriver, connect_implicit_ports, constructSubCell, constructSubCellNoImplicitPorts, enableNewPlacement, enableNewPlacement, extend, extend, getDefaultClock, getDefaultTechMapper, getGlobalClock, getSinkCell, getSourceCell, getSourceCell, getSourceLeaf, getSourcePlaceable, getSourcePlaceableLeaf, getSubCellClass, getTechMapHint, getTechMapHint, getTechMapper, growAndShiftl, lockChildPlacement, lsb, lsb, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, msb, msb, msbIndx, netlist, netlist, netlist, netlist, netlist, netlist, netlist, netlist, padClock_o, padClock_o, padClock_o, padClock, padClock, padClock, padIn_o, padIn_o, padIn_o, padIn, padIn, padIn, padInout_o, padInout_o, padInout_o, padInout, padInout, padInout, padOut_o, padOut_o, padOut_o, padOut, padOut, padOut, padOutT_o, padOutT_o, padOutT_o, padOutT, padOutT, padOutT, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, printTechMapHints, range, rotate, rotate, scale, scale, setBBox, setDefaultTechMapper, setFloorPlannerIsMaster, setTechMappingEnabled, setWandH, signExtend_o, signExtend, signExtend, sink, source, takeBot_o, takeBot, takeBot, takeBotSigned_o, takeBotSigned, takeTop_o, takeTop, takeTop, techmap, techMappingEnabled, translate, translate, zeroExtend_o, zeroExtend, zeroExtend, zeroExtendRight_o, zeroExtendRight
 
Methods inherited from class byucc.jhdl.Logic.LogicStatic
add_o, add_o, and_o, and_o, and, and, buf_o, buf_o, buf, buf, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux, nc, nc, nc, nc, nc, nc, not_o, not_o, not, not, or_o, or_o, or, or, reg_o, reg, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor, xor_o, xor
 
Methods inherited from class byucc.jhdl.Logic.LogicGates
add_o, add_o, add_o, add_o, add_o, add_o, add, add, add, add, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub, addsub, addsub, addsub, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, ashiftr_o, ashiftr, ashiftr, buf_o, buf_o, buf, buf, checkValueRepresentableInWidth, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux_o, mux_o, mux_o, mux_o, mux_o, mux, mux, mux, mux, mux, mux, name, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nand, nc, nc, nc, nc, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor_o, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, nor, not_o, not_o, not, not, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or_o, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, or, pulldown, pulldown, pullup, pullup, reg_o, reg_o, reg_o, reg_o, reg, reg, reg, reg, regc_o, regc_o, regc_o, regc_o, regc, regc, regc, regc, regce_o, regce_o, regce_o, regce_o, regce, regce, regce, regce, regp_o, regp_o, regp_o, regp_o, regp, regp, regp, regp, regpe_o, regpe_o, regpe_o, regpe_o, regpe, regpe, regpe, regpe, regr_o, regr_o, regr_o, regr_o, regr, regr, regr, regr, regre_o, regre_o, regre_o, regre_o, regre, regre, regre, regre, regs_o, regs_o, regs_o, regs_o, regs, regs, regs, regs, regse_o, regse_o, regse_o, regse_o, regse, regse, regse, regse, shiftl_o, shiftl, shiftl, shiftr_o, shiftr, shiftr, sub_o, sub_o, sub_o, sub_o, sub_o, sub_o, sub, sub, sub, sub, tbuf_o, tbuf_o, tbuf, tbuf, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor_o, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xnor, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor_o, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor, xor
 
Methods inherited from class byucc.jhdl.base.Structural
behavioralModelIsAvailable, clock, clockMethodIsDisabled, clockMethodIsDisabled, clockMethodIsEnabled, clockMethodIsEnabled, defaultSimulationModelIsBehavioral, hasBeenTraced, hasBeenTraced, hasBehaviorInClockMethod, hasBehaviorInPropagateMethod, isAsynchronouslyScheduled, isAsynchronouslyScheduled, isFallingEdgeTriggered, isReadyToBeAsynchronouslyScheduled, isRisingEdgeTriggered, needsToBeAsynchronouslyScheduled, needsToBeClocked, propagate, propagateMethodIsDisabled, propagateMethodIsDisabled, propagateMethodIsEnabled, propagateMethodIsEnabled, reset, willUseHWUpdate, willUseHWUpdate
 
Methods inherited from class byucc.jhdl.base.Cell
addPort, addPorts, addProperties, addProperties, addProperty, addProperty, addProperty, addProperty, antecedantIsBehaviorallyModeled, antecedantIsBehaviorallyModeled, bind, bind, bind, bind, clk, connect, connectAllWires, connectOptional, disableAllBehavioralModels, disableBehavioralModel, enableBehavioralModel, getArgument, getAttachedPort, getAttachedWire, getAttachedWireNoException, getCellNetlist, getCellNetList, getCellNetlist, getCellNetlist, getDescendents, getFlatNetlist, getFlatNetlistableChildren, getGeneric, getHeight, getNetlistableChildren, getPlacementInfo, getPortProperties, getPortRecord, getPortRecords, getProperties, getProperty, getPropertyValue, getSinkWires, getSourceWires, getUniqueCellName, getWidth, getX, getY, hasPort, hasPorts, in, in, inout, inout, isAsynchronousSourceSinkResolved, isBehaviorallyModeled, isBehaviorallyModeledBranch, isInput, isLeafCell, isNetlistable, isNetlistable, isNetlistablePort, isNetlistLeaf, isNotNetlistable, isNotNetlistablePort, isNotVisible, isOutput, isPlaceable, isPlaceable, isPlaced, isPlaced, isPlacementLocked, isRoot, isSimulateable, isSimulateable, isSink, isSource, isVisible, isVisible, join, lockPlacement, nc, out, out, param, popHierarchy, port, port, port, postorderCheck, preorderCheck, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchy, pushHierarchyNoImplicitPorts, pushHierarchyNoImplicitPorts, removeAllUnconnectedPorts, removePort, removeProperty, replaceProperty, replaceProperty, resetBehavioralModelsToDefaults, setAsynchronousSourceSinkResolved, setGeneric, setHeight, setNotNetlistable, setNotNetlistable, setNotVisible, setNotVisible, setPlacementInfo, setPortNotNetlistable, setPortNotNetlistable, setProperty, setWidth, subClassDelete, toString, uniquifyCell, userDefinedClockCount, verifyAndCleanup
 
Methods inherited from class byucc.jhdl.base.Node
addObservable, addSimulatorCallback, checkAll, delete, getBuildingFlag, getChildren, getChildrenEnumeration, getInstanceName, getParent, getParentCell, getRelatives, getSystem, getWires, optimize, orphanAllowed, printAllChildren, printTree, removeSimulatorCallback, setDefaultClock
 
Methods inherited from class byucc.jhdl.base.Nameable
caseSensitivity, caseSensitivity, disableNameClashChecking, getFullName, getFullNameNoTestBench, getHierNameNoTestBench, getInstanceNo, getInstanceNumber, getLeafName, getLeafName, getRelativeName, getUserName, getUserName, hasUserSpecifiedName, isDescendantOf, setInstanceNumber
 
Methods inherited from class java.lang.Object
clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait
 

Field Detail

cellname

public static final java.lang.String cellname
The static cellname (netlist reference name) for and7_dp

See Also:
Constant Field Values

width

protected int width
The port interface for: and7_dp i_0 : in ("gw") i_1 : in ("gw") i_2 : in ("gw") i_3 : in ("gw") i_4 : in ("gw") i_5 : in ("gw") i_6 : in ("gw") o_0 : out ("gw") parameter: "gw" (INTEGER). This parameter represents the generic port width of and7_dp.


cell_interface

public static CellInterface[] cell_interface
Constructor Detail

and7_dp

protected and7_dp(Node parent)
Used only by child classes to pass up the parent cell.

Parameters:
parent - Parent cell

and7_dp

protected and7_dp(Node parent,
                  java.lang.String name)
Used only by child classes to pass up the parent cell and instance name.

Parameters:
parent - Parent cell
name - Instance name of the cell

and7_dp

public and7_dp(Node parent,
               Wire i_0,
               Wire i_1,
               Wire i_2,
               Wire i_3,
               Wire i_4,
               Wire i_5,
               Wire i_6,
               Wire o_0)
Constructs a new and7_dp.

Parameters:
parent - The parent Cell to the and7_dp
i_0 - The Wire to be connected to input port i_0
i_1 - The Wire to be connected to input port i_1
i_2 - The Wire to be connected to input port i_2
i_3 - The Wire to be connected to input port i_3
i_4 - The Wire to be connected to input port i_4
i_5 - The Wire to be connected to input port i_5
i_6 - The Wire to be connected to input port i_6
o_0 - The Wire to be connected to output port o_0

and7_dp

public and7_dp(Node parent,
               java.lang.String instanceName,
               Wire i_0,
               Wire i_1,
               Wire i_2,
               Wire i_3,
               Wire i_4,
               Wire i_5,
               Wire i_6,
               Wire o_0)
Constructs a new and7_dp. The initial String parameter specifies the instance name.

Parameters:
parent - The parent Cell to the and7_dp
instanceName - The instance name of the and7_dp
i_0 - The Wire to be connected to input port i_0
i_1 - The Wire to be connected to input port i_1
i_2 - The Wire to be connected to input port i_2
i_3 - The Wire to be connected to input port i_3
i_4 - The Wire to be connected to input port i_4
i_5 - The Wire to be connected to input port i_5
i_6 - The Wire to be connected to input port i_6
o_0 - The Wire to be connected to output port o_0

and7_dp

public and7_dp(Node parent,
               java.lang.String s0,
               Wire w0,
               java.lang.String s1,
               Wire w1,
               java.lang.String s2,
               Wire w2,
               java.lang.String s3,
               Wire w3,
               java.lang.String s4,
               Wire w4,
               java.lang.String s5,
               Wire w5,
               java.lang.String s6,
               Wire w6,
               java.lang.String s7,
               Wire w7)
Constructs a new and7_dp, connecting each Wire to the port whose name is given by the accompanying String parameter

Parameters:
parent - The parent Cell to the and7_dp
s0 - The name of the port to which w0 will be connected
w0 - The Wire to be connected to the port specified by s0
s1 - The name of the port to which w1 will be connected
w1 - The Wire to be connected to the port specified by s1
s2 - The name of the port to which w2 will be connected
w2 - The Wire to be connected to the port specified by s2
s3 - The name of the port to which w3 will be connected
w3 - The Wire to be connected to the port specified by s3
s4 - The name of the port to which w4 will be connected
w4 - The Wire to be connected to the port specified by s4
s5 - The name of the port to which w5 will be connected
w5 - The Wire to be connected to the port specified by s5
s6 - The name of the port to which w6 will be connected
w6 - The Wire to be connected to the port specified by s6
s7 - The name of the port to which w7 will be connected
w7 - The Wire to be connected to the port specified by s7

and7_dp

public and7_dp(Node parent,
               java.lang.String instanceName,
               java.lang.String s0,
               Wire w0,
               java.lang.String s1,
               Wire w1,
               java.lang.String s2,
               Wire w2,
               java.lang.String s3,
               Wire w3,
               java.lang.String s4,
               Wire w4,
               java.lang.String s5,
               Wire w5,
               java.lang.String s6,
               Wire w6,
               java.lang.String s7,
               Wire w7)
Constructs a new and7_dp, connecting each Wire to the port whose name is given by the accompanying String parameter The initial String parameter specifies the instance name.

Parameters:
parent - The parent Cell to the and7_dp
instanceName - The instance name of the and7_dp
s0 - The name of the port to which w0 will be connected
w0 - The Wire to be connected to the port specified by s0
s1 - The name of the port to which w1 will be connected
w1 - The Wire to be connected to the port specified by s1
s2 - The name of the port to which w2 will be connected
w2 - The Wire to be connected to the port specified by s2
s3 - The name of the port to which w3 will be connected
w3 - The Wire to be connected to the port specified by s3
s4 - The name of the port to which w4 will be connected
w4 - The Wire to be connected to the port specified by s4
s5 - The name of the port to which w5 will be connected
w5 - The Wire to be connected to the port specified by s5
s6 - The name of the port to which w6 will be connected
w6 - The Wire to be connected to the port specified by s6
s7 - The name of the port to which w7 will be connected
w7 - The Wire to be connected to the port specified by s7

and7_dp

public and7_dp(Node parent,
               ArgBlockList abl)
Constructs a new and7_dp, connecting its ports as given by the String-Wire pairs in the ArgBlockList. Any generic assignments are made through String-String pairs in the ArgBlockList.

Parameters:
parent - The parent Cell to the and7_dp
abl - The list of String-Wire pairs for port assignments, and String-String pairs for generic assignments.

and7_dp

public and7_dp(Node parent,
               java.lang.String instanceName,
               ArgBlockList abl)
Constructs a new and7_dp, connecting its ports as given by the String-Wire pairs in the ArgBlockList. Any generic assignments are made through String-String pairs in the ArgBlockList. The initial String parameter is the instance name.

Parameters:
parent - The parent Cell to the and7_dp
instanceName - The instance name of the and7_dp
abl - The list of String-Wire pairs for port assignments, and String-String pairs for generic assignments.
Method Detail

getCellName

public java.lang.String getCellName()
Description copied from class: Cell
Access the cell name associated with a derived class. The cellname field is lazily evaluated on the first call of this method. Can be overriden to make cellname different by instance. If the field does not exist, this defaults to the classname.

Overrides:
getCellName in class Cell
Returns:
the cell name associated with a derived class, null if not declared.

cellInterfaceDeterminesUniqueNetlistStructure

public final boolean cellInterfaceDeterminesUniqueNetlistStructure()
Description copied from class: Cell
When false, the default behavior of this method, each cell will list itself separately in a netlist, guaranteeing that the netlist will not have invalid data at the expense of a larger file-size. Overriding this method to return true allows JHDL to save memory and netlists to be smaller by sharing the netlist structures that are guaranteed to be identical. NOTE: Do not override this unless every possible condition responsible for structural differences in a class (types and amount of children cells created, and arrangements of wires connected to ports) is included in the cellInterface[] of that class.

Overrides:
cellInterfaceDeterminesUniqueNetlistStructure in class Cell
Returns:
false if not overridden, preventing all memory sharing

type

public int type()
Description copied from interface: PreDefinedSchematic
This method returns one of the predefined schematic constants to identify the type of this cell.

Specified by:
type in interface PreDefinedSchematic
Returns:
A predefined schematic constant

main

public static void main(java.lang.String[] argv)

test

public static void test()


Copyright ? 2006 Brigham Young University, Configurable Computing Laboratory. All Rights Reserved.