||This class records all of the relevant state information for
physical IOBs, slices, and BlockRAMs in Virtex2, including
information about flip-flops, RAMs, and RAM address signals.
||The Xilinx Logical Allocation file (.ll file) parser for Virtex2
||This class is used by Virtex2XpressBitstreamParams
||This class parses Section 5 (the optimization section) of Virtex2
.mrp (Map report) files generated with the
option to Map and builds a
relates physical signal names to all their logical signal aliases.
||This class is used to keep track of the location of a symbol
(flip-flop or RAM) in the readback bitstream.
||An implementation of interface CharStream, where the stream is assumed to
contain only ASCII characters (without unicode processing).
||Describes the input token stream.
||This class is used to record the information about a specific
Virtex2 FPGA during the creation of an
.rbentry file as
well as provide a method for calculating the absolute offset of a
readback state bit from the offset provided by the Xilinx logical
allocation file (.ll) file.
||This class builds hardware symbol tables (
for Xilinx Virtex2-based designs described in JHDL.
||This class parses XDL file for Virtex2 FPGA designs and builds the
data structures necessary to associate logical state elements with
their state in readback bitstreams.